ABB XDD501A101 3BHE036342R0101 analog output module

ABB XDD501A101 3BHE036342R0101 analog output module

Technical data of product parameters

The following is a simplex fail-safe SIL 2 architecture, where I/O modules
operate in 1oo1D under no fault conditions and will fail-safe on the first
detected fault. The processor will operate in 1oo2D under no fault conditions,
will degrade to 1oo1D on the first fault in either processor module and will failsafe when there are faults on both processor modules.A SIL 2 fault tolerant input architecture can have dual or triple input modules XDD501A101 3BHE036342R0101
with a dual processor and single output modules. The illustration shows a dual
input arrangement where the dual input modules operate in 1oo2D under no
fault conditions, they degrade to 1oo1D on detection of the first fault in either
module of the redundant pair, and when a fault occurs on the second module
the controller fails-safe.
The processor operates in 1oo2D under no fault conditions, will degrade to
1oo1D on the first fault in either processor module and will fail-safe when there XDD501A101 3BHE036342R0101
are faults on both processor modules. The output module operates in 1oo1D
under no fault conditions and fail-safe on the first detected fault.
When a triple input module arrangement is configured the group of input
modules operate in 2oo3D under no fault conditions, degrade to 1oo2D on the
detection of first fault in any module, then degrade to 1oo1D on the detection
of faults in any two modules and fail-safe when there are faults on all three
modules.A SIL 2 Fault Tolerant output architecture has a single output module with XDD501A101 3BHE036342R0101
dual processor and single or redundant input modules.
The illustration shows a SIL 2 single output arrangement where the output
module operates in 1oo1D under no fault conditions and fail-safe on the first
detected fault. The processor will operate in 1oo2D under no fault conditions,
will degrade to 1oo1D on the first fault in either processor module and will failsafe when there are faults on both processor modules.A SIL 2 fault tolerant “High Demand” architecture has dual input, dual
processor and dual output modules. In a dual arrangement the input modules
operate in 1oo2D under no fault conditions, degrade to 1oo1D on the detection
of the first fault in either module, and will fail-safe when there are faults on
both modules.
A triple input module arrangement can also be configured if it is required to
increase the fault tolerance of the input. When a triple input module
arrangement is configured the input modules operate in a 2oo3D under no
fault conditions, degrade to 1oo2D on detection of the first fault in any module,
then degrade to 1oo1D on the detection of faults in any two modules, and will
fail-safe when there are faults on all three modules.

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