SC510 3BSE003832R1 central processor ABB CPU low-voltage AC contactor

SC510 3BSE003832R1 central processor ABB CPU low-voltage AC contactor

Technical data of product parameters

All elements are SC510 3BSE003832R1copied from the source file into the destination file each time
the instruction is executed. Elements are copied in ascending order.
If your destination file type is a timer, counter, or control file, be sure that the
source words corresponding to the status words of your destination file
contains zeros.
Be sure that you accurately specify the starting address and length of the data
block you are copying. The instruction will not write over a file boundary (such SC510 3BSE003832R1
as between files N16 and N17) at the destination. An error occurs if a write is
attempted over a file boundary.
You can perform file shifts by specifying a source element address one or
more elements greater than the destination element address within the same
file. This shifts data to lower element addressesThis instruction loads elements of a file with either a program constant or
value from an element address.
The instruction fills the words of a file with a source value. It uses no status
bits. If you need an enable bit, program a parallel output that uses a storage
address. The following figure shows how file instruction data is manipulated.You have the option of using indirect word-level and bit-level addresses for SC510 3BSE003832R1
instructions specifying word addresses when using an SLC 5/03 (OS302), SLC
5/04 (OS401), or SLC 5/05 processors. Refer to Specifying an Indirect
Address on page E-14 for more information.The value present in S:24 is overwritten with the position value when a
false-to-true transition of the FFL/FFU or LFL/LFU rung occurs. For the
FFL/LFL, the position value determined at instruction entry is placed in S:24.
For the FFU/LFU, the position value determined at instruction exit is placed
in S:24.
When the DN bit is set, a false-to-true transition of the FFL/LFL rung does
not change the position value or the index register value. When the EM bit is
set, a false-to-true transition of the FFU/LFU rung does not change the
position value or the index register value.

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