EMERSON 5X00119G01 controller module

EMERSON 5X00119G01 controller module

Technical data of product parameters

These five bits, in conjunction with5X00119G01 , allow software to
select dynamically the address space that the master accesses
during VMEbus cycles. Setting any of these five bits to 1 causes
the master to drive the corresponding address modifier line to
high (if the AMSEL bit is set to 1).
Clearing any of the bits to 0 causes the master to drive the
corresponding line to low (if the AMSEL bit is set to 1).
These bits are cleared by 5X00119G01
Bit 7 Software uses the AMSEL control bit to define what is the
source of the AM code driven by the master during a VMEbus
cycle. 5X00119G01
Setting the bit to 1 causes the master to drive the contents of the
lower six bits onto the address modifier lines. No attempt is
made to check the value stored in this register for reserved or
illegal address modifiers.
Clearing the AMSEL bit causes the master to determine the AM
code dynamically. 5X00119G01
AMSEL should normally be cleared to 0. This bit is cleared by
SYSRESET. This register is used to enable the VMEchip interrupt
handler to respond to specific utility interrupt requests.
When the interrupt handler detects an interrupt request
from one of the enabled functions, it responds by requesting the MC68030 to initiate an interrupt acknowledge cycle
if the master interrupt enable bit is set in the PCC. All the
bits in this register are cleared by any reset. As described in the Programming the GCSR section in this 5X00119G01
chapter, the GCSR provides two global attention interrupt bits:
SIGLP and SIGHP, which allow other VMEbus masters to
interrupt the MC68030 on a low priority (Level 1) and on a high
priority (Level 5). Setting the SIGLEN control bit to 1 unmasks
the SIGLP interrupt.
Bit 2 As described in the Programming the GCSR section in this
chapter, the GCSR provides four location monitors. Two of
them, location monitor 0 and 1, cause a local interrupt when the
VMEbus address they are configured to monitor is accessed.
The LM0EN control bit allows software to mask the interrupt
requested when an access is detected to the address monitored
by location monitor 0. The level of local interrupt is shown in
Table 4-6. Setting the LM0EN bit to 1 unmasks the interrupt

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