AB Rockwell 1756-PA75 AC power supply
Technical data of product parameters
The table address and table function code registers point to the 1756-PA75 AC
DMAC table. Table 5-1 is an example. The table has two entries for
each data block: the data address and the byte count.
When the DMAC table walks, it copies the first longword from the 1756-PA75 AC
table into the table address register, and the second longword from
the table into the byte count register. It then goes to the data transfer
state. If the table walk caused the link bit to be set, the DMAC table
walks again after the data transfer state has endedThe WD33C93 connects to a separate 8-bit data bus on the PCC and 1756-PA75 AC
not to the local MC68030 bus. This allows the PCC to collect one
longword of data by transferring one byte at a time from the
WD33C93 without using the processor bus. When a longword is
ready, the chip requests the local bus and transfers it. This scheme
lightens the load on the MC68030 local bus. The PCC provides the interface for MC68030 accesses of the 1756-PA75 AC
WD33C93. It uses the nonmultiplexed mode which requires that
the software use the WD33C93 pointer registers to access its
internal registers. The WD33C93 registers are accessible indirectly
through the address register at $FFFE4000. The PCC features two 16-bit programmable tick timers. A timer
generates a periodic interrupt to the MC68030 at the programmed
rate. The period is 6.25 µs to 0.4 seconds in 6.25 µs increments. The
timer may also be disabled. The timer interrupt level is
programmable and it provides a status/ID vector when its
interrupt is acknowledged.
Product picture display
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