Bentley 133396-01 module card

Bentley 133396-01 module card

Technical data of product parameters

AACK_ and TA_ allows the PPC Slave to assert a retry to the processor in
the event that the transaction is unable to complete on the PCI side. It
should be noted that any transaction that crosses a PCI word boundary
could be disrupted after only having a portion of the data transferred.
The PPC Slave cannot perform compelled burst write transactions. The
PPC bus protocol mandates that the qualified retry window must occur no 133396-01
later than the assertion of the first TA_ of a burst transaction. If the PHB
was to attempt a compelled linkage for all beats within a burst write, there
is a possibility that the transaction could be interrupted. The interruption
would occur at a time past the latest qualified retry window and the PPC
Slave would be unable to retry the transaction. Therefore, all burst write
transactions are posted regardless of the write posting attribute within the 133396-01
associated map decoder register.
If the PPC Slave is servicing a posted write transaction and the PPC FIFO
can accept the transaction, the assertion of AACK_ and TA_ occurs as soon
as the PPC Slave decode logic settles out and the PPC bus protocol allows 133396-01
for the assertion. If the PPC FIFO is full, the PPC Slave holds the processor
with wait states (AACK_ will not be asserted) until there is room within the
PPC FIFO to store the pending transaction.
The PPC Slave divides PPC command types into three categories: address
only, write, and read. If a command type is an address only and the address 133396-01
presented at the time of the command is a valid PHB address, the PPC
slave will respond immediately by asserting AACK_. The PHB will not
respond to address only cycles where the address presented is not a PHB

Product picture display

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