DS200SLCCG1ACC DS215SLCCG1AZZ01A card parts sales
Technical data of product parameters
through a 16-bit Data Transceiver in response to control signals from Interface Timing
and Control Logic. The data transceiver isolates the VMEbus data lines from theDS200SLCCG1ACC DS215SLCCG1AZZ01A
Internal Data Bus. Address lines A12 through A31 map the board into either
short I/O A16 space, standard A24 space or extended A32 space. Data transfer
control signals from the VMEbus determine whether data is moved to the board
(Write) or from the board DS200SLCCG1ACC DS215SLCCG1AZZ01Aand D16 transfers are supported.
There are several registers on the board which control operational mode, buffer and
block size, interrupt sources, gain mode, sample rate, and trigger mode. These
various registers are described individually in Chapter 3.
Bus Interrupter
Access to the VMEbus interrupt structure is provided through a Bus Interrupter. If the
interrupt is enabled, an interrupt is generated in response to a request either by the
scan timing logic as a data ready flag, or by the channel counter after a specific
number of buffer locations have been updated. The interrupt function isDS200SLCCG1ACC DS215SLCCG1AZZ01A
implemented inside the EPM7160 Programmable Logic Device. Details of the
interrupter capabilities are described in Chapter 3.
Interval Timer and Channel Counter
A triple 16-bit counter device contains the Interval Timer and Channel Counter. Two
of the counter sections are driven from a 6.25 MHz clock, and can be cascaded as a 32-
bit timer for delays up to 687 seconds. Timed data acquisition bursts occur at the
interval programmed into the Interval Timer. The channel counter can beDS200SLCCG1ACC DS215SLCCG1AZZ01A
programmed to generate an interrupt after a programmed number of data buffer
locations have been updated, or can be read directly to serve as a data pointer.
Data Buffer Memory
Organization and Control
Digitized inputs are stored in a 16-bit data buffer, the size of which can be software
configured from 8 data words to 1,024 data words. Data in the buffer is organized
into consecutive channel blocks, each of which represents a complete scan of all active
channels.
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