FOXBORO FBM201 module
Technical data of product parameters
If a major fault occurs while executing theFBM201 interrupt subroutine, execution
immediately switches to the fault routine. If the fault was recovered by the
fault routine, execution resumes at the point that it left off in the I/O interrupt
subroutine. Otherwise, the fault mode is entered.
If a DII interrupt occurs while executing the I/O interrupt subroutine,
execution immediately switches to the DII subroutine. When the DII
subroutine is scanned to completion, execution resumes at the point that it left FBM201
off in the I/O interrupt subroutine.
If the STI timer expires while executing the I/O interrupt subroutine,
execution immediately switches to the STI subroutine. When the STI
subroutine is scanned to completion, execution resumes at the point that it left FBM201
off in the I/O interrupt subroutine.
If two or more I/O interrupt requests are detected by the processor at the
same instant, or while waiting for a higher or equal priority interrupt
subroutine to finish, the interrupt subroutine associated with the specialty I/O
module in the lowest slot number is scanned first. For example, if slot 2 (ISR
20) and slot 3 (ISR 11) request interrupt service at the same instant, the
processor first scans ISR 20 to completion, then ISR 11 to completionISR Number – Specifies the subroutine file number that will be executed
when an I/O interrupt is generated by an I/O module. The ISR
Numbers are not part of the status file, but they are part of the I/O
configuration for each slot in the SLC system. FBM201
• I/O Slot Enables (Words S:11 and S:12) – These words are bit mapped
to the 30 I/O slots. Bits S:11/1 through S:12/14 refer to slots 1 through
30. Bits S:11/0 and S:12/15 are reserved.
The enable bit associated with an interrupting slot must be set when an
interrupt occurs. Otherwise a major fault will occur. Changes made to
these bits using the Data Monitor function take effect at the next end of
scan. FBM201
• I/O Interrupt Pending Bits (Words S:25 and S:26) – These words are bit
mapped to the 30 I/O slots. Bits S:25/1 through S:26/14 refer to slots 1
through 30. Bits S:25/0 and S:26/15 are reserved. The pending bit
associated with an interrupting slot is set when the corresponding I/O
slot interrupt enable bit is clear at the time of an interrupt request. It is
cleared when the corresponding I/O event interrupt enable bit is set, or
when an associated RPI instruction is executed. The pending bit for an
executing I/O interrupt subroutine remains clear when the ISR is
interrupted by a DII, STI, or fault routine.
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