OVATION Westinghouse 1C31234G01 I/O Module

OVATION Westinghouse 1C31234G01 I/O Module

Technical data of product parameters

• No Response Bit NR 1C31234G01is set if the target processor responds to the
MSG instruction that it cannot process the message at the current time
(for DH-485 and DH+ protocols only). This means that the MSG
should be retried. The NR bit is reset the next time the MSG instruction
gets scanned. Do not set or reset this bit. It is informational only.
• Enabled and Waiting Bit EW (bit 10) is set after the enable bit is set and
the message is physically placed in one of the four available transmit
buffers. The EW bit is reset when either the ST or ER bit is set. Do not
set or reset this bit. It is informational only. 1C31234G01
• Continuous Operation CO (bit 11)(1) Set this bit if you wish to
continually resend the MSG instruction. We recommend that internal
timeout control be used for this option and the rung be unconditionally
true. Use this bit to turn the mode on and off. A MSG instruction
occupies one of the four channel transmission buffers when its CO bit
is set. Therefore, a maximum of four MSG instructions per channel may
have their CO bit set. 1C31234G01
This mode will continuously operate provided that the rung is
continually scanned. If the instruction errors prior to the MSG timeout,
it will automatically retry until it is successful. If the instruction errors
due to a MSG timeout, the MSG stops triggering. The EN bit must be
toggled off and back on to resume operation.For SLC 5/05 Ethernet (channel 1) communications, the ST bit
indicates internally that the Ethernet daughterboard has received a
command and it is acceptable for a transmission attempt. The command
has not yet been transmitted. 1C31234G01
For all broadcast message writes, and for DF1 Radio Modem
communications, the ST bit only indicates that the command has been
successfully transmitted.Do not manipulate the MSG instruction control block values except as noted
below. For example, do not clear the first word of the control block, do not
unlatch the time-out control bit (except in an SLC 5/02 MSG instruction), and
so on

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