TRICONEX AO3481 efficient monitoring of production and machine data

TRICONEX AO3481 efficient monitoring of production and machine data

Technical data of product parameters

As shown in the functional block diagram in FigureAO3481 on page 18, the
VMIVME-2510B provides for the control/monitoring of 64 output/input lines via
eight 8-bit data registers. These 64 bits of I/O are addressable as two 32-bit long
words, four 16-bit words, or as eight 8-bit bytes. These eight registers are selected by
address bits A2, A1, DS0 and DS1.
Direction control of I/O is on a byte basis. Eight direction control bits in the CSR
select whether an octal port is to be input or output. In addition, the CSR contains a AO3481
Fail LED bit, two test mode bits, and five storage bits that can be used for message
passing between VMEbus masters.
Built-in-Test
The built-in-test feature of the VMIVME-2510B is enabled by asserting the Test Mode
(TM) bits in the CSR. Test Mode P3 controls the transceivers for connector P3, while AO3481
Test Mode P4 controls the P4 transceivers. While in the Test Mode, the I/O
transceivers are disabled, allowing data to be looped back through the I/O Data
Registers for test purposes without disturbing the device being controlled. A port The VMIVME-2510B is designed to support data transfers in supervisory or AO3481
non-privileged short I/O memory space. A jumper is provided as shown in Figure 1-2
on page 20 (Address Decoder Block Diagram) to allow user selection of either I/O
access type. The jumper (J1) is shown on the logic diagram Figure 1-7 on page 26. The
VMIVME-2510B is factory configured (Jumper J1 is not installed) to respond to
short-supervisory I/O access.
The VMIVME-2510B is designed with two sets of board select switches and decode
logic, as shown in Figure 1-2 on page 20, to provide an efficient memory address map
for CSR and I/O addresses. This feature allows the user to map CSR and I/O
addresses into contiguous memory locations when configuring subsystems that
require more than one board.

Product picture display

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reminder

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